The present invention is directed to the coating of a semiconductor structure to passivate its surface, and more particularly is concerned with the formation of a thick glass coating over a semiconductor structure containing a patterned metal layer.
The passivation of the surface of a semiconductor substrate is carried out by coating it with a layer of oxide or other inert material. Where the entire surface of the semiconductor material is exposed, the formation of the oxide layer can be carried out through conventional thermal growth processes. However, when it is desired to provide the oxide layer over a patterned conducting layer or other type of semiconductor structure having an uneven surface, thermal oxidation processes are not suitable. In this case, the formation of the passivating layer must be accomplished through the use of deposition or other coating processes.
Coupled with this constraint is the fact that the resulting oxide layer must have a relatively planar surface in order that subsequent photolithographic projection onto this surface will have proper definition. In other words, if the surface of the passivation layer is uneven, a light pattern that is projected onto the surface through a photomask could be skewed in the locations where the height of the passivation surface varies, and hence result in a faulty circuit.
In the past various approaches have been employed to provide a passivation layer having a substantially planar surface. In one such approach, a relatively thick layer of glass, e.g., silicon dioxide, germanium dioxide or a mixture of the two, is deposited over the entire surface of the substrate. The glass is then heated to a temperature near its melting temperature to cause it to reflow so that its surface becomes smooth. This technique has been used with success where the patterned conducting layer is comprised of polycrystalline silicon or similar such materials having a relatively high melting temperature. However, when the patterned conducting layer is comprised of a material such as aluminum or aluminum alloys, this technique cannot be employed, since the melting temperature of the glass is typically greater than that of the conducting material. If the glass were to be heated to cause it to reflow, the integrity of the conducting layer would be diminished, with a faulty circuit being the likely result.
Accordingly, when a patterned conducting layer is comprised of a metal or other such material having a relatively low melting temperature, the passivating glass layer is coated on the structure by means of a spinning process so as to provide a relatively planar surface without the need for high temperatures. Basically, the spinning process involves placing a solution of the passivating material, e.g. an oxide precursor, in the center of the semiconductor wafer and then spinning the wafer at a speed and for a length of time sufficient to cause the solution to spread out over the entire surface of the structure. The resulting film that is formed over the structure has a substantially planar surface.
However, the spinning technique is also not without its attendant limitations. Foremost among these is the fact that the glass film should not have a thickness greater than about 1,000-3,000 angstroms. If the film is any thicker than this, the differential coefficient of expansion between the film and the underlying silicon or metal layer will cause the film to crack when it undergoes temperature changes.
This limitation prevents the practical use of the spinning technique in a commercial environment. Typically, a patterned metal layer might have a height of about 0.7-1.2 microns, so that the passivating glass layer should have a thickness of at least 0.8-1.3 microns if the metal layer is to be properly covered. Furthermore, when the topography of the semiconductor structure is particularly intricate, the passivating layer might have to have a thickness on the order of 2.0 microns or more.
Accordingly, in the past the use of the spinning technique to coat a glass passivating layer has been limited to semiconductor structures having relatively flat surfaces, since a thick layer of glass is not necessary to passivate these structures.